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Features
* * * * * * * * * * * * * *
Full TCPA V1.1b Compatibility Single Chip Turnkey Solution Hardware Asymmetric Crypto Engine 2048 RSA Sign in 500 ms Using CRT AVR 8-bit RISC Microprocessor Internal EEPROM Storage for 10+ RSA Keys 33 MHz LPC (Low Pin Count) Bus for Easy PC Interface Tamper Detectors for Physical or Environmental Attacks Secure Hardware and Firmware Design and Chip Layout True Random Number Generator (RNG) Secure Real-time Clock Option 3.3V 10% Supply Voltage 28-lead TSSOP Package 0-70C Temperature Range
Trusted Platform Module AT97SC3201 Summary
Description
The AT97SC3201 is a fully integrated security module designed to be integrated into personal computers and other embedded systems. It implements version 1.1b of the Trusted Computing Platform Alliance (TCPA) specification for Trusted Platform Modules (TPM). The TPM includes a crypto accelerator capable of computing a 2048-bit RSA signature in 500 ms, and a 1024-bit RSA signature in 100 ms, both using CRT. The chip communicates with the PC through the LPC interface, which runs at 33 MHz. In addition, it supports SIRQ (for interrupts) and CLKRUN (to permit clock stopping). Figure 1. AT97SC3201 Block Diagram
ROM Program
EEPROM Program
33 MHz LPC Interface IOA, IOB, IOC VBB 32.768 kHz RTC GPIO
AVR 8/16 Bit CPU
SRAM
EEPROM Data RNG CRYPTO Engine
Timer Physical Security Circuitry
The chip includes a full hardware random number generator that is used for the TCPA protocol and is also available to the system for any random numbers it may need during normal operation.
Rev. 2015AS-TCPA-07/02
Note: This is a summary document. A complete document is available under NDA. For more information, please contact your local Atmel sales office.
A real-time clock function is available using an external battery and crystal. The chip provides tamper detection if the battery or crystal is removed or tampered with, and the current time value can be signed by the appropriate internal keys to verify its accuracy. (Contact Atmel for current status of this option.) The battery detector can be used without the crystal for lower cost. In this mode, the TPM can indicate to the system if it has been removed from the PC in any way and also take actions internally. The chip uses a dynamic internal memory management scheme to store from 10 to 20 keys. Other than the standard TCPA commands (TPM_Evictkey, TPM_Loadkey), no system intervention is required to manage this internal key cache. The TPM is offered to OEM manufacturers as a turnkey solution, including the firmware integrated on the chip. In addition, Atmel provides the necessary driver software for integration into certain operating systems, along with BIOS drivers. (Contact Atmel for a complete list of operating systems supported.) Full documentation for TCPA primitives can be found on the TCPA web site, www.trustedcomputing.org. This specification includes only mechanical, electrical and LPC protocol information.
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Absolute Maximum Ratings
Note: Operating Temperature..............................0C to +70C Storage Temperature (without Bias)...........0C to + 70C Voltage on I/O Pins..............................-0.1 to VCC +0.3V Voltage on VCC with Respect to Ground.................6.0V Maximum ESD Voltage..........................................2000V Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification may cause temporary or permanent failure. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 1. DC Parameters VCC = 3.0 to 3.6V; Temperature = 0 to 70C
Symbol VCC ICC ISB IBB ILIO VIH VIL VOH VOL IOH IOH IOH IOL IOL IOL IOLCR CI Notes: Output Low Current, CLKRUN# Input Pin Capacitance 7 6 30 1.9 113 Parameter Supply Voltage Operating Current at fclk = 33 MHz Standby Current, Chip Idle Battery Current Input Leakage Input High Threshold Input Low Threshold Output High Voltage Output Low Voltage 0.5 x VCC 2 0.1 Min 3.0 Nom 3.3 25 Max 3.6 50 100 4 3 VCC + 0.5 0.3 * VCC Units V mA A A A V V V 0.1 * VCC V mA mA 116 mA mA mA mA mA pF At IOUT = -500 A At IOUT = 1.5 mA VOUT = .3 VCC VOUT = .9 VCC VOUT = .7 VCC VOUT = .6 VCC VOUT = .1 VCC VOUT = .18 VCC At VOUT = .615 * VCC Note 2 Note 1 Note 1 Note 1. VCC = 0V. fxtal = 0. Vin = VCC or GND Notes
-0.5
0.9 x VCC
-24 -0.5
1. Values listed are advance information and are likely to change as production silicon is characterized. 2. These parameters guaranteed but not tested.
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Table 2. AC Parameters Cl = 10 pf. VCC = 3.0 to 3.7V; Temperature = 0 to 70C
Symbol TVAL Parameter CLK to Signal Valid Delay - LAD0-3 Min 2 Nom Max 11 Units ns Notes Measured at Vtrise = 0.285 * VCC and Vtfal = 0.615 * VCC. Measured from clk at Vtest = 0.4 * VCC.
TON TOFF TSU TH TRST TRST-CLK TRST-OFF TRHFF TCLKIN TCLKLO TCLKHI Note:
Float to Active Delay Active to Float Delay Input Setup Time to CLK Input Hold Time from CLK Reset Active Time After Power Stable Reset Active After CLK Stable Reset Active to Output Float Delay RST# High to First FRAME# Assertion CLK Period CLK Low Duration CLK High Duration
2 28 7 0 1 100 40 500 29.5 13.4 13.4 30 31 18 18
ns ns ns ns ms m ns clocks ns ns ns Note 3 Note 1, Note 3 Note 1, Note 3 Note 2 Note 2 Note 2
1. All parameters measured with respect to signal crossing Vtest = 0.4 * VCC unless otherwise noted. 2. These parameters guaranteed but not tested. 3. The minimum parameter must never be violated under any circumstances unless Ireset# is asserted. If proper CLKRUN# signaling is observed, the maximum specification can be violated.
Table 3. Ordering Information
Ordering Code AT97SC3201-01AC Package 28A Operation Range Commercial (0 to 70 C)
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Package Drawing
Figure 2. 28A3 - TSSOP
b
L L1 E E1
e
Top View
End View
COMMON DIMENSIONS (Unit of Measure = mm)
A
D
A2
SYMBOL D E E1
MIN 9.60
NOM 9.70 8.10 BSC
MAX 9.80
NOTE 2, 5
6.00 - 0.80 0.19
6.10 - 1.00 - 0.65 BSC
6.20 1.20 1.05 0.30
3, 5
Side View
A A2 b e L L1
4
0.45 1.00 REF
0.60
0.75
Notes:
1. This drawing is for general information only. Please refer to JEDEC Drawing MO-153, Variation DB for additional information. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and E1 to be determined at Datum Plane H. 1/8/02
R
2325 Orchard Parkway San Jose, CA 95131
TITLE 28A3, 28-lead, 6.1 x 9.7 mm Body, 0.65 pitch, Thin Shrink Small Outline Package (TSSOP)
DRAWING NO. 28A3
REV. A
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(c) Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life support devices or systems. ATMEL (R) is the registered trademark of Atmel Corporation. Other terms and product names may be the trademark of others. Printed on recycled paper.
2015AS-TCPA-07/02 xM

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